In many conventional RF communication and sensor systems, a HF, VHF or UHF signal is generated by a MHz clock for a RF signal of interest. However, energy-efficient microprocessors, consumer electronics, or sensors are typically clocked using a much lower frequency oscillator in the 16-32 kHz range. This saves power since the lower frequency clocks can run with very low power (in the nW to μW range of powers) compared to more moderate power (in the mW range of powers) that is typical for MHz oscillators.
However, resonators operating at such lower frequencies are typically tuning-fork resonators (for which prior art designs are typically 2-10 mm in length) rather than the shear mode slabs used with MHz oscillators. For some applications, where a combination of both analog and digital systems are utilized and time synchronization is critical for the various RF subsystems, e.g., for GPS or inertial navigation applications, the phase noise and jitter of a kHz clock generated by a prior art tuning-fork resonator can reduce the accuracy and increase the power of the overall system. This can be due to frequency drift of the energy-efficient microprocessor's clock between clock cycles requiring more extensive processing during the update for re-synchronization. Thus, resonators for very low power, small, high Q, low phase noise clocks, which can also be easily integrated with other miniaturized components, are needed. This disclosure describes a new method of 1) reducing the size of kHz resonators and clocks, 2) integrating the kHz resonator with electronics on the substrate to form an integrated kHz clock, and 3) integrating the kHz clock with a MHz oscillator on a common semiconductor substrate for highly compact RF system integration. For example, with reference to item 3), a kHz clock (which calls for a kHz oscillator) is used by microprocessors for logic synchronization whereas UHF, VHF or HF oscillators are used for RF analog signal processing. Thus, a kHz frequency oscillator and one or more UHF, VHF or HF oscillators are needed for optimization of the power budgets when both analog and digital signals are present and preferably these oscillators should preferably use fabrication techniques which can be harmoniously used together to realize a single chip having two (or more) oscillators disposed thereon, one of which operates in the kHz frequency range (preferably from 10 to 100 kHz) and another one (or more) which operates in the UHF, VHF or HF frequency range (i.e., at frequencies above 3 MHz).
kHz frequency range quartz tuning fork mode oscillators have been manufactured for years using a combination of wet quartz etching and hybrid packaging in ceramic packages using a free standing plate of quartz 10. See the prior art quart tuning fork of FIGS. 1a-1c. The tuning fork electrodes are deposited on the top (see elements 11t), bottom (see elements 11b), and sides (see elements 11s) of the quartz tines in order to generate the proper lateral electric fields in the Z′ cut crystal to obtain extensional motion along the side of the tines. The Z′ direction is perpendicular to the plane of the tuning fork crystal. Typically, to obtain a parabolic f/T profile, the Z direction is rotated 0-5° around the X-axis as is depicted by FIG. 2. In order to deposit the side electrodes 11s (which are not shown in FIG. 1a for ease of illustration), a shadow masking technique is utilized after the resonators are etched from a single piece of quartz 10. However, this prior art technique is difficult to implement when a wafer-level process is used and when the quartz resonators are bonded to an underlying handle wafer. When using a handle wafer, it is difficult to cleanly define the side electrodes while obtaining uniform step coverage and no overcoating of handle wafer itself. During the release of the resonators from the handle wafer, any overcoated metal can tear from electrodes 11s on the sidewalls of the tines, thus resulting in a low yield. In addition, using prior art processes, the integration of a kHz clock with other components was not possible.
U.S. Pat. No. 7,750,535 mentioned above relates to a method for integrating a MHz frequency range quartz shear mode resonator to an arbitrary substrate for integrated MHz frequency oscillators and filters. The technology disclosed herein extends this prior art technique by describing a method for integrating a much lower frequency (kHz frequency range) tuning fork resonator using extensional-mode piezoelectric coupling to provide a wafer-scale process for integrated quartz tuning-fork resonator/oscillators. The disclosed resonator is different compared to conventional tuning fork resonators to allow for planar processing of the electrodes on top and bottom of a quartz plate without the need for side electrodes. The new process disclosed herein can be utilized harmoniously with and contemporaneously during a shear-mode fabrication sequence to allow for integration of both MHz shear-mode and kHz tuning-fork mode resonators on the same semiconductor wafer, should that be desired. Additionally, ultra-small kHz resonators can be fabricated with wafer-level processing and also allow for small die sizes. As will be seen, the presently disclosed resonator may have a size of only 1.26 mm long and 0.8 mm wide whereas prior art kHz resonators tend to be 2-10 mm in size.